The power-efficiency startup claims its chiplet can cut energy loss by over 50%, just as AI workloads strain data centers and drive demand for smarter silicon.
AI’s Energy Crisis: PowerLattice Has a Solution
As AI demand outpaces compute supply, one limiting factor stands out: power consumption. Training and running large language models requires vast energy, making efficiency at the silicon level more important than ever.
Enter PowerLattice, a stealth-mode startup founded in 2023 by veterans from Qualcomm, NUVIA, and Intel. The company just raised a $25 million Series A led by Playground Global and Celesta Capital, bringing its total funding to $31 million.
- Its breakthrough? A power-saving chiplet that can reduce energy consumption by more than 50%.
- Among its biggest champions: former Intel CEO Pat Gelsinger, now a general partner at Playground Global, who personally backed the team and its tech.
A “Dream Team” Tackles Power Delivery
The core innovation lies in a tiny chiplet that delivers power more efficiently by positioning it closer to the processor itself. This minimizes energy loss—a longstanding challenge in chip architecture.
“This is the hard stuff: how do you get power into the device?” Gelsinger said.
“There are very few teams that can do it. PowerLattice has assembled what I’d call the dream team of power delivery.”
Founded by Dr. Peng Zou, PowerLattice represents a rare convergence of deep domain expertise, hardware pragmatism, and manufacturing-readiness.
Validation and Early Traction
PowerLattice has already hit a key milestone:
- Its first chiplets are being fabricated by TSMC, and tested by an unnamed manufacturer.
- Broader customer testing is expected in early 2026.
Potential clients include a who’s who of the chip world:
- Nvidia, AMD, Broadcom
- AI-focused startups like Cerberus, Grok, d-Matrix, and NextSilicon
While many of these players have internal R&D teams working on energy efficiency, Gelsinger believes PowerLattice’s outsider perspective and measurable performance gains will drive early adoption.
Competing in a Hot Market
PowerLattice isn’t alone. It faces competition from startups like Empower Semiconductor, which raised $140 million in a Series D in 2024.
However, Gelsinger calls PowerLattice’s claimed 50% efficiency improvement “extraordinary” and sees the potential for significant market share in the AI chip supply chain.
“Even if a customer splits volume between PowerLattice and internal designs,” Gelsinger noted,
“we think our ability to capture meaningful share will quickly emerge.”
More Funding Likely on the Horizon
With production trials underway, PowerLattice is expected to raise a much larger round soon to scale manufacturing.
- Gelsinger predicts fast interest as the power demands of AI intensify.
- The startup’s appeal lies in its non-invasive solution: rather than overhauling architectures, customers can drop in a chiplet that improves performance and reduces energy draw.
“The idea is bold, the benefits are large,” Gelsinger said.
“I expect others will soon say, ‘That’s a great idea — let me try as well.’”
PowerLattice, a startup founded by ex-Qualcomm, NUVIA, and Intel engineers, has raised $25M for a power-saving chiplet that cuts energy loss by 50%. Backed by ex-Intel CEO Pat Gelsinger, its tech could help AI chipmakers address compute and energy bottlenecks as demand for data centers soars.
